Abstract

Adiabatic Quantum-Flux-Parametron (AQFP) logic is an adiabatic superconductor logic family that has been proposed as a future technology towards building extremely energy-efficient computing systems. In AQFP logic, dynamic energy dissipation can be drastically reduced due to the adiabatic switching operations using AC excitation currents, which serve as both clock signals and power supplies. As a result, AQFP could overcome the power/energy dissipation limitation in conventional superconductor logic families such as rapid-single-flux-quantum (RSFQ). Simulation and experimental results show that AQFP logic can achieve an energy-delay-product (EDP) near quantum limit using practical circuit parameters and available fabrication processes. To shed some light on the design automation and guidelines of AQFP circuits, in this paper we present an automatic synthesis framework for AQFP and perform synthesis on 18 circuits, including 11 ISCAS-85 circuit benchmarks, 6 deep-learning accelerator components, and a 32-bit RISC-V ALU, based on our developed standard cell library of AQFP technology. Synthesis results demonstrate the significant advantage of AQFP technology. We forecast 9,313×, 25,242× and 48,466× energy-per-operation advantage, compared to the synthesis results of TSMC (Taiwan Semiconductor Manufacturing Company) 12 nm fin field-effect transistor (FinFET), 28 nm and 40 nm complementary metal-oxide-semiconductor (CMOS) technology nodes, respectively.

Highlights

  • Adiabatic Quantum-Flux-Parametron (AQFP) logic is an adiabatic superconductor logic family that has been proposed as a future technology towards building extremely energy-efficient computing systems

  • AQFP circuits operate at a frequency of few GigaHertz, in between conventional complementary metal-oxide-semiconductor (CMOS) technology and RSFQ logic

  • The demonstrations of several AQFP implementations have been reported, which include an 8-bit carry-look-ahead adder[15], a 16-word by 1-bit register file[16], a prototype deep learning accelerator[17] and a large-scale benchmark chip consisting of 10,000 AQFP logic gates[18]

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Summary

Introduction

Adiabatic Quantum-Flux-Parametron (AQFP) logic is an adiabatic superconductor logic family that has been proposed as a future technology towards building extremely energy-efficient computing systems. AQFP could overcome the power/energy dissipation limitation in conventional superconductor logic families such as rapid-single-flux-quantum (RSFQ). The demonstrations of several AQFP implementations have been reported, which include an 8-bit carry-look-ahead adder[15], a 16-word by 1-bit register file[16], a prototype deep learning accelerator[17] and a large-scale benchmark chip consisting of 10,000 AQFP logic gates[18]. These results demonstrate the robustness of AQFP technology against circuit parameter variations and the potential towards building very large-scale integrated circuits using AQFP devices. It is forecasted that the AQFP technology can achieve a maximum of 9,313×, 25,242× and 48,466× improvements (reduction) in energy consumption per clock cycle, respectively, compared to the results using 12 nm, 28 nm and 40 nm TSMC technologies

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