Address generation for lossless frame memory compression in an H.264/AVC encoder

Abstract

An inter-prediction in an H.264/AVC encoder requires a large amount of access to the external memory. Thus, the power consumption and encoding latency caused by the external data transactions are significantly high. One approach to reduce the external data transactions is the frame memory compression (FMC). For lossless FMC, the compressed data size of each macroblock depends on the contents of the macroblock, and consequently, an address table is required to locate the start address of the compressed data of each macroblock. In this paper, a novel address calculation scheme is proposed for lossless FMC. Due to regular memory allocation, the memory addresses of all macroblocks in a frame are calculated using 7 additions. For 1280×720 videos, 2KB of internal memory is enough to store all information to calculate the memory address.