Adder circuit design using advanced quantum dot cellular automata (AQCA)

Abstract

Recent experiments in the field of VLSI designing and Nanotechnology have demonstrated a working cell suitable for implementing the Quantum-dot Cellular Automata (QCA). QCA is a transistor less computational model which is expected to provide high density nanotechnology implementations of various CMOS circuits. QCA has been constrained by the problem of meta-stable states. QCA adder with comparatively less number of cells and area has been proposed in this paper. This paper also demonstrates a reversible logic synthesis for one bit adder which gives a superior solution for side channel attack based on power analysis in security applications. The new proposed hybrid method reduces cell counts and area and uses conventional form of QCA cells. QCA implementation provides efficient design methodology for faster speed, smaller size and low power consumption when it compared to technology imposed by transistors. QCA provides ability to quickly layout a QCA design by providing an extensive set of CAD tools.