Adaptive wiring for 20nm scale epitaxial silicon Ohmic contacts to silicon nanowires

Abstract

Contacts to silicon nanowires are formed by etching holes through a dielectric stack of silicon dioxide and silicon nitride. P-type, in situ doped epitaxial silicon is grown through the holes, then polished flat and silicided or capped by metal to form the device electrodes. This novel contact method has been used in two ways, either in conjunction with adaptive wiring patterned with electron-beam lithography or in a random-connection process with a fixed wiring pattern printed with photolithography. By using the former process, the authors report the fabrication of closely spaced contacts to silicon nanowires. Electron-beam lithography allows the authors to adapt the wiring pattern to each individual target device, and is used to define 20nm scale contacts. In the latter process, the authors use a technique wherein a large array of contact lines is printed without alignment to individual nanowires. In this case, nanowires are connected by chance, relying on relatively long contact lines with relatively large spacing (down to 200nm). The authors compare the advantages of the two wiring techniques.