Adaptive Non-speculative DFE with Extended Time Constraint for PAM-4 Receiver

Abstract

This paper presents a novel approach to solve the time constraint issue of DFE with PAM4 signaling. By using track and hold operation to sample signals of the same level at two points, the time constraint of 1 UI in direct DFE can be extended to 1.5UI. The FIR-tap employs LVDS structure to maintain common voltage and SS-LMS algorithm is used to obtain the optimal tap weight. The first post-cursor ISI cancellation is done by the LVDS tap and a sufficient settling time is provided by the proposed DFE. The proposed structure may eliminate the loop unrolling speculative DFE for PAM-4, which leads to less hardware for PAM-4 DFE implementation. A PAM-4 serial link using the proposed DFE was designed in a 65nm CMOS technology and analyzed. Channels with 11.9 dB and 13.8 dB losses were compensated through CTLE and the proposed 1 tap DFE, and simulation results demonstrate the time constraint can be extended without deterioration of the eye opening.