Adaptive Edge Detection Technique Implemented on FPGA

Abstract

This article proposes an adaptive model that improves the edge detection operation in digital images. One of the disadvantages of traditional edge detection operators such as Prewitt, Sobel and Canny is using fixed-size masks which limit the edge detection operation in images with different degrees of the gray levels. In the proposed model, the image histogram is used as a criterion for selecting a suitable mask according to image specifications. In this model, the mask size of the edge detection operator is determined by measuring the contrast of the image to improve the quality of edge detection. For this purpose, a mask with a small size is used for images that have high contrast to increase processing speed, and for the images that do not have high contrast larger masks are used to increase the accuracy of edge detection. The proposed model is implemented utilizing real-time processing and parallelism capabilities of the Xilinx-Virtex6 FPGA. And, in order to reduce the effect of parallelism on increasing the area size of implemented hardware resources, existing resources are reused appropriately. The results show that with the use of the proposed method the edge detection is done in just 2.2 ms and a trade-off between the quality of detected edge and the hardware resources is established.