Abstract
A reconfigurable gate array allows different circuits to be implemented on a single device. When combined with a microprocessor, used as part of a high density data storage channel, it is possible to implement the time-critical sections of the storage algorithm in dedicated circuits. The storage algorithm can be changed as required by recording channel characteristics, by reconfiguring the gate array to implement different dedicated circuits. Interleaving circuits that increase the burst error correcting capability of recording codes have been implemented on a reconfigurable gate array to provide an adaptive hardware device suitable for use with a microprocessor.
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