Abstract
Current Source Drivers (CSDs) are investigated for MHz Power Factor Correction (PFC) applications. Due to the fast duty cycle change, the half-bridge (HB) CSD topology can hardly be accepted for high frequency PFC Applications. To solve the problem, the full-bridge (FB) CSD topology is used instead. It is interesting to note that the FB CSD with the continuous inductor current can actually achieve adaptive drive currents inherently depending on the drain currents in the main power MOSFETs to achieve optimal design. The loss analysis and design procedure are also presented for the FB CSD for the boot PFC converter. Due to the fast switching speed and the switching loss reduction, an efficiency improvement of 3.5% can be achieved to a 1MHz/ 300W boost PFC converter with the line input voltage of 110V. The analysis and simulation results verified the conclusion.
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