Adaptation and Evaluation of the Output-Deviations Metric to Target Small-Delay Defects in Industrial Circuits

Abstract

Timing-related defects are a major cause of test escapes and field returns for very deep-submicron (VDSM) integrated circuits. Small-delay variations induced by crosstalk, process variations, power supply noise, and resistive opens and shorts can cause timing failures in a design, leading to quality and reliability concerns. This article describes the authors' work with a previously proposed test-grading technique that uses output deviations for screening small-delay defects.