Abstract
A new complex-filter which offers substantial area reduction is presented. According to this topology, the real-active only integrator is used for implementing the first order image reject filter. We have also discussed the design of a new area effective second order complex filter using lossy integrator building blocks. Using SPECTRE simulation tool, we have also justified the feasibility of the proposed circuit.
Highlights
I N ORDER to remedy the limitation of the zero IF and conventional IF receivers, low-IF architectures are proposed and effectively used in state-of the art RF transceivers [1]
Circuits called as real active only filters, which use the intrinsic capacitors of the active devices at the various nodes of circuit, may be employed to implement IF filters with small chip area [11]
In order to achieve the issues encountered in realizing image-reject complex filters, it is proposed a design of a new area-effective first order complex-filter topology capable of providing electronically adjustable time constant
Summary
I N ORDER to remedy the limitation of the zero IF and conventional IF receivers, low-IF architectures are proposed and effectively used in state-of the art RF transceivers [1]. This architecture provides a good trade-off in terms of power dissipation, integration capability and complexity. The common approach to overcome this problem is to use complex filters which is usually used in the low-IF wireless receiver to filter out the image signal, for its easy integration on chip [26]. The obtained results verify that the circuit is feasible and can be used to implement area-effective complex filter circuit
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