Abstract

As device geometries shrink, the shallow extension regions must also be scaled to achieve ultra-shallow highly-activated abrupt junctions. Laser thermal annealing (LTA) has shown the potential to provide a solution for this need. An investigation was performed to look at the activation and deactivation characteristics of common p- and n-type dopant materials in a 20 mm pre-amorphized silicon layer. Laser energy was varied from 0.30 J/cm/sup 2/ to 0.68 J/cm/sup 2/ which causes a varied melt depth shallower than and beyond the amorphous-crystalline interface. These junctions were then rapid thermal annealed (RTA) for 30 seconds at temperatures between 700/spl deg/C and 1000/spl deg/C. Four-point probe, secondary ion mass spectrometry (SIMS) and Hall analysis were performed on the samples. Results show that significant deactivation affects all species, with >50% reduction in active carrier concentration seen after the 1000/spl deg/C anneals. The 1999 International Technology Roadmap for Semiconductors' (ITRS) sheet resistance and junction depth requirements are met for the B and As implants with 0.46 J/cm/sup 2/ LTA processing and RTA processing at 800/spl deg/C and below. For the P and Sb junctions, 0.46 J/cm/sup 2/ LTA processing and RTA processing at 700/spl deg/C meet the roadmap requirements. Additionally, the 1000/spl deg/C anneals were reduced to 2 sec, showing that this thermal budget reduction was not sufficient to allow the junctions to achieve the ITRS requirements.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call