Abstract
The i860™ is a high performance microprocessor used in the Intel Touchstone project. This paper proposes a paradigm for programming the i860™ that is modelled on the vector instructions of the Cray computers. A collection of Fortran callable assembler subroutines (Naspack routines) were written that mimic the concurrent vector instructions of the Cray with cache taking the place of vector registers. Using the Naspack subroutines on an adisolve, we obtained a speedup of 3.9 for a 128 by 128 system over compiled code.
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