Accurate extraction of WSe2 FETs parameters by using pulsed I-V method at various temperatures.

Byung Gook Park,Sung Tae Lee,Won Mook Kang,Jong-Ho Lee,In Tak Cho

doi:10.1186/s40580-016-0091-9

Abstract

This work investigates the intrinsic characteristics of multilayer WSe2 field effect transistors (FETs) by analysing Pulsed I-V (PIV) and DC characteristics measured at various temperatures. In DC measurement, unwanted charge trapping due to the gate bias stress results in I-V curves different from the intrinsic characteristic. However, PIV reduces the effect of gate bias stress so that intrinsic characteristic of WSe2 FETs is obtained. The parameters such as hysteresis, field effect mobility (μeff), subthreshold slope (SS), and threshold voltage (V th) measured by PIV are significantly different from those obtained by DC measurement. In PIV results, the hysteresis is considerably reduced compared with DC measurement, because the charge trapping effect is significantly reduced. With increasing temperature, the field effect mobility (μeff) and subthreshold swing (SS) are deteriorated, and threshold voltage (V th) decreases.

Highlights

Two-dimensional(2D) layered materials such as graphene and boron nitride offer new opportunities in the field of electronics with its excellent physical, chemical properties [1,2,3,4,5,6]
WSe2 field effect transistors (FETs) can be very appealing for the nanoscale electronic applications and blackplanes for flat panel display (FPD) due to their high mobility (~100 cm2/V·s), excellent on/off ratio(~107), and low subthreshold swing (SS, ~70 mV/ decade) [7,8,9]
We show the I-V curves measured by Pulsed I-V (PIV) and DC measurement methods, and compare the parameters extracted from the results obtained by both methods at various temperatures (−30 to 40 °C)

Summary

Introduction

Two-dimensional(2D) layered materials such as graphene and boron nitride offer new opportunities in the field of electronics with its excellent physical, chemical properties [1,2,3,4,5,6]. WSe2 FETs can be very appealing for the nanoscale electronic applications and blackplanes for flat panel display (FPD) due to their high mobility (~100 cm2/V·s), excellent on/off ratio(~107), and low subthreshold swing (SS, ~70 mV/ decade) [7,8,9]. When we simulate the circuits which consist of WSe2 FETs, it is necessary to know the parameters of the FETs. Most of the parameters reported up to now were extracted from the I-V characteristics obtained by the DC method. These values were not correct, because a large hysteresis is observed due to the gate bias

Discussion

Conclusion