Accurate analytical delay expression for short channel CMOS SOI inverter using Monte Carlo simulation

Abstract

This paper reports on an analysis of propagation delay τ D for deep sub-micron CMOS/SOI inverters. We derive simple propagation delay expressions for step and ramp inputs, using Monte Carlo simulation. These expressions consist of linear combinations of time constants. As a physical device simulation tool, the Monte Carlo method is well adapted to such a study, since it does not require any analytical model of electrical device parameters. The validity of the above expressions is critically checked via Monte Carlo simulation of a wide range of inverters under various load conditions. The discrepancy between calculated and simulated propagation delay is less than 10%.