Accounting for time-dependent effects on CMOS total-dose response in space environments

Abstract

Time-dependent charge buildup and annealing processes cause the ionizing radiation response of CMOS devices and circuits to depend strongly on the dose rate of the exposure. Oxide-trap charge annealing and interface-trap buildup in nMOS transistor can lead to positive threshold voltage shifts in a space environment, while negative threshold voltage shifts are commonly observed after irradiations at typical laboratory dose rates [50–300 rad(Si)/s]. Thus, devices that pass laboratory testing can fail at the low dose rates encountered in space due to positive nMOS transistor threshold-voltage shifts above preirradiation values, i.e. “rebound”. We summarize how this issue can be addressed in total-dose hardness assurance test methods for space. An example of such a guideline is the revised U.S. military-standard ionizing-radiation-effects test method (MIL-STD 883D, Test Method 1019.4).