Abstract
Recent advances in DNA sequencing technologies include the generation of long reads, with lengths from tens to hundreds of thousands of base pairs each. State-of-the-art algorithm Minimap2 is able to process these data and the most commonly used short reads, but is memory- and computationally-intensive: to process a human genome, its running times can reach up to several hours in powerful machines. As a means of making this technology more available to hospitals and clinics, hardware accelerators have addressed these shortcomings with many short read mappers in the past, and their application to this new generation of softwares is an area of active research. Here we present a FPGA-based accelerator for Minimap2 with focus on its operation for short reads. We gathered profiling behaviors to determine the algorithm's bottleneck. We generated a hardware block for one recurrent loop in the critical function that can be integrated into a parallelizable architecture. Execution with short reads has shown a reduction of 155x in terms of required clock cycles in the accelerated section. Data transfer overhead is measured and discussed.
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