Abstract

The SKA (Square Kilometer Array) radio telescope will become the most sensitive telescope by correlating a huge number of antenna nodes to form a vast array of sensors in a region over one hundred kilometers. Faceting, the wide-field imaging algorithm, is a novel approach towards solving image construction from sensing data where earth surface curves cannot be ignored. However, the traditional processor of cloud computing, even if the most sophisticated supercomputer is used, cannot meet the extremely high computation performance requirement. In this paper, we propose the design and implementation of high-efficiency FPGA (Field Programmable Gate Array) -based hardware acceleration of the key algorithm, faceting in SKA by focusing on phase rotation and gridding, which are the most time-consuming phases in the faceting algorithm. Through the analysis of algorithm behavior and bottleneck, we design and optimize the memory architecture and computing logic of the FPGA-based accelerator. The simulation and tests on FPGA are done to confirm the acceleration result of our design and it is shown that the acceleration performance we achieved on phase rotation is 20× the result of the previous work. We then further designed and optimized an efficient microstructure of loop unrolling and pipeline for the gridding accelerator, and the designed system simulation was done to confirm the performance of our structure. The result shows that the acceleration ratio is 5.48 compared to the result tested on software in gridding parts. Hence, our approach enables efficient acceleration of the faceting algorithm on FPGAs with high performance to meet the computational constraints of SKA as a representative vast sensor array.

Highlights

  • Remarkable advances in sensor technology and acceleration of Internet of Things (IoT) technology have led to explosive increases in the volume and rate of sensing data, which poses mounting challenges to data storage and real-time processing in the cloud-based system

  • The contributions of this paper can be summarized as: (1) We proposed an efficient parallelization and pipeline structure designed for the two most time-consuming procedures of the faceting algorithm and implemented it on the FPGA, (2) we further improved the computing performance of the phase rotation accelerator through the optimized pipelined computing kernel, and (3) we presented a comprehensive analysis of the achieved performance

  • To reduce resource usage for the triangle, we investigated how lookup tables can be used as an alternative to the compiler-generated version and customized the Cordic IP core that Xilinx FPGA

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Summary

Introduction

Remarkable advances in sensor technology and acceleration of Internet of Things (IoT) technology have led to explosive increases in the volume and rate of sensing data, which poses mounting challenges to data storage and real-time processing in the cloud-based system. The Square Kilometer Array (SKA) is a multinational astronomical project designed to build the generation radio telescope to operate over a wide wavelength range of meters to centimeters. It will have an unprecedented large collection area of approximately one square kilometer with a Sensors 2020, 20, 4070; doi:10.3390/s20154070 www.mdpi.com/journal/sensors. Sensors 2020, 20, 4070 maximum baseline of 3000 kilometers, providing full detection sensitivity for frequencies up to at least 14 GHz, which is 50 times higher than the Karl G. The low-frequency radio telescope arrays have the common characteristics of the large FoV, high dynamic range, and high sensitivity. An imaging algorithm in the process of inversion is required to consider w-term, which describes the error caused by the non-coplanar array [12]

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