Accelerated Co-Simulation of Hardware-Software System Based on Configurable Hardware Accelertor and Selective Simulation

Abstract

The paper presents new approach to hardware-software co-simulation. It offers extretnely high speed of simulation. Presented solution combines hardware emulation technique with selective hardware simulation. This two methods allow to build precisely tailored hardware accelerated co-simulation system. Systenl allows for full debug of HDL described hardware and software that works together with real part of a design. Software can interact with virtual (HDL described) part of a design. We have introduced an acceleration technique based on selective simulation of virtual hardware. Developed technique maintains simulation time dependencies between virtual hardware and software that allows to keep the same simulation time in hardware and software part of design while reducing computation power required for HDL simulation.