Abstract
A novel architecture for an AC (i.e. high-pass) amplifier is proposed allowing a drastic reduction of the cutoff frequency to the sub-Hertz range. It builds upon the classic AC configuration with a high gain amplifier and a parallel RC circuit in the feedback loop, by increasing the feedback resistance through bootstrapping. Resistance multiplying factors higher than four orders of magnitude are easily achievable. The basic principle can be applied to several practical implementations, though in this letter it is demonstrate with measurement results of an op-amp based discrete implementation.
Highlights
Electronic circuits and amplifiers, which provide DC or very low frequency blocking, have received considerable attention in the last decades
The basic principle can be applied to several practical implementations, though in this letter it is demonstrate with measurement results of an op-amp based discrete implementation
The use of the well-known architecture shown in Figure 1 based on a high-gain amplifier, with gain settled by the ratio of two capacitors, C1/C2 and cutoff frequency defined by the feedback capacitor C2 and resistor R; and second, resorting to mechanisms, either active or passive, to increase the feedback resistance in order to obtain a very low cutoff frequency
Summary
A novel architecture for an AC (i.e. high-pass) amplifier is proposed allowing a drastic reduction of the cutoff frequency to the sub-Hertz range. It builds upon the classic AC configuration with a high gain amplifier and a parallel RC circuit in the feedback loop, by increasing the feedback resistance through bootstrapping. Resistance multiplying factors higher than four orders of magnitude are achievable. The basic principle can be applied to several practical implementations, though in this letter it is demonstrate with measurement results of an op-amp based discrete implementation
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