A zeroth-order phase-locked loop control algorithm

Abstract

A method of minimizing dynamics and reducing phase error toward zero for arbitrary input frequency-phase while maintaining stability in phase-locked loops (PLLs) is presented. The system transfer function becomes theoretically of zero order and the error is zero. Practically, the steady-state phase error is zero and the system is of minimum dynamics/order. The method is in synthesizing a feedforward control that is added to the standard PLL. The feedforward, effected from the system input to a summing junction, comprises an inverse feedforward control principle relative to the part of the feedback loop seen after the summing junction.