Abstract
In their SIAM J. on Computing paper [27] from 1992, Martel et al. posed a question for developing a work-optimal deterministic asynchronous algorithm for the fundamental load-balancing and synchronization problem called Certified Write-All. In this problem, introduced in a slightly different form by Kanellakis and Shvartsman in a PODC'89 paper [17], p processors must update n memory cells and then signal the completion of the updates. It is known that solutions to this problem can be used to simulate synchronous parallel programs on asynchronous systems with worst-case guarantees for the overhead of a simulation. Such simulations are interesting because they may increase productivity in parallel computing since synchronous parallel programs are easier to reason about than asynchronous ones are.This paper presents a solution to the question of Martel et al. Specifically, we show a deterministic asynchronous algorithm for the Certified Write-All problem. Our algorithm has O(n + p4 log n) work, which is optimal for a non-trivial number of processors p ≤ (n/log n)1/4. In contrast, all known deterministic algorithms require superlinear in n work when p = n1/r, for any fixed r ≥ 1. Our algorithm generalizes the collision principle used by the algorithm T that was introduced by Buss et al. [7].
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