Abstract
By utilizing frequency translational resistive feedback, a recently proposed blocker current-cancelling wideband receiver (Lenka and Banerjee in IEEE Trans Very Large Scale Integr Syst 27(5): 993–1006, 2019), tolerates 0-dBm blockers beyond 40 MHz offset with little degradation in performance. However, like most wideband receivers, the architecture is far less tolerant to “harmonic blockers”, that is, blockers located at or around precise integer multiples of the local oscillator frequency. This paper presents an enhanced blocker current-cancelling receiver that prevents harmonic blockers from undergoing large gain and thus boosts the receiver’s resilience to such blockers. Implemented in a 22-nm CMOS process, the RX can tolerate up to $$-$$ 1 dBm harmonic blockers. On the other hand, it achieves a 1-dB standard blocker compression point of + 3 dBm and out-of-band third-order input intercept point (OB-IIP3) of + 24 dBm at 40 MHz offset from the LO frequency.
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