Abstract
ABSTRACTThis article presents the design and implementation of a wideband frequency synthesizer which uses a direct digital synthesis as a fractional divider in the phase‐locked loop. The frequency resolution is 7.1 × 10−5 Hz. A phase‐domain model of this synthesizer is analyzed and simulated. A formula of output phase noise is derived. The output phase noise of synthesizer is −124 dBc/Hz (10 kHz offset) at the frequency of 1 GHz. The frequency synthesizer model has been designed with advantages of wide bandwidth, low phase noise, high‐frequency resolution, low spurious, high frequency stability, and simple structure. With frequency multiplier and divider module, the frequency band of synthesizer can be extended from 250 MHz to 8 GHz. The module is suitable for communication instrument. © 2013 Wiley Periodicals, Inc. Microwave Opt Technol Lett 55:2454–2457, 2013
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