A VLSI synthesis tool for complementary output delta modulation FIR filters

Abstract

An application specific high level synthesis tool is presented for designing linear Delta Modulation (DM) FIR filters, with parallel implementation of their complementary responses, using a Kaiser windowing technique. It is based on a hardware reduction technique which is taking advantage of the special characteristics of DM filters in order to improve their performance concerning noise reduction. The synthesis tool can be linked to various VLSI CAD systems for automated layout construction of high performance DM filter chips. A DM filter chip is demonstrated, compiled by the tool and processed by the VENUS-S semicustom design system.