A virtual-source emission-diffusion I-V model for ultra-thin black phosphorus field-effect transistors

Abstract

In this paper, we develop an analytic model based on the theory of virtual-source emission-diffusion (VS-ED) to describe ambipolar current conduction in ultrathin black phosphorus (BP) field-effect transistors (FETs). Unlike the VS model which is strictly applicable to quasiballistic devices, the VS-ED model can be applied to long-channel devices with drift-diffusive transport. The model comprehends the in-plane band structure anisotropy in BP, as well as the asymmetry in electron and hole current conduction characteristics. The model also includes the effect of Schottky-type source/drain contact resistances, which are voltage-dependent and can significantly limit current conduction in the on-state in BP FETs. Model parameters are extracted using measured data of back-gated BP transistors with gate lengths of 1000 nm and 300 nm with BP thicknesses of 7.3 nm and 8.1 nm, and for the temperature range 180–298 K. Compared to previous BP models that are validated only for room temperature and near-equilibrium bias conditions (low drain-source voltage), we demonstrate an excellent agreement between the model and data over a broad range of bias and temperature values. The model is also validated against numerical technology computer-aided design data of back- and top-gated BP transistors with a channel length of 300 nm and a thickness of 8.1 nm. The model is implemented in Verilog-A, and the capability of the model to handle both dc and transient circuit simulations is demonstrated using SPECTRE. The model not only provides physical insight into technology-device interaction in BP transistors but can also be used to design and optimize BP-based circuits using a standard hierarchical circuit simulator.