A very-high-speed field-programmable gate array using metal-to-metal antifuse programmable elements

Abstract

A ViaLink TM programming element, which forms a metal-to-metal link when programmed, has been incorporated in a CMOS field programmable gate array. The low impedance and small physical size of the ViaLink, combined with an innovative logic cell design, result in an FPGA with very high speed, high density, and low power consumption. Advanced CAE design tools permit fast implementation of high gate utilization designs with logic functions operating at speeds in excess of 100 MHz. This paper describes the logic cell structure, interconnect architecture, performance characteristics and CAE tools developed for the QL8 × 12, the first member of a family of high-speed FPGAs.