A versatile multi-hit, multi-channel Vernier time-to-digital converter ASIC

Abstract

This paper describes the implementation of a multi-hit, multi-channel, multi-mode time-to-digital converter ASIC implemented in 0.35μm commercial CMOS technology. The ASIC is designed to meet the India-based Neutrino Observatory (INO) experimental requirements. The ASIC has eight channels, each channel capable of handling four hits: a pair of rising and falling edges. The core TDC channels are designed using Vernier ring oscillator method which provides high resolution and large dynamic range simultaneously. Each channel has an in-built separate calibration capable of determining the period of oscillators with an accuracy of few picoseconds. The TDC ASIC has both serial and parallel interfaces. The TDC has a selectable dynamic range of 4 μs, 16 μs, 32 μs & 64 μs. The conversion time for each hit measurement is maximum ∼500 ns. The TDC ASIC is tested and has the resolution of ∼120 ps (LSB) and precision (σ) of less than 70 ps across the channels. The measured values of differential non-linearity (DNL) is [−0.459, 0.510] LSB and the integral non-linearity over 4 μs dynamic range is [−0.0156, 0.0154] % of the full scale.