Abstract
This paper describes a versatile and extensible software tool called QUI2VER to support integration of custom components for research prototyping in programmable logic. From higher-level specifications of components and interconnections in an input file, QUI 2VER generates an output VHDL file with a desired system configuration. The value of QUI2VER stems from how abstract interfaces can be specified in support of component interconnection for system-level configuration. Because it is an original research tool, QUI 2VER can also be readily modified and enhanced to serve research needs. The utility of QUI2VER is illustrated by describing its use in the prototype implementation of a multibank embedded memory architecture in an Altera Stratix logic chip as part of ongoing system-on-chip research
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