A variation-aware design for storage cells using Schottky-barrier-type GNRFETs

Abstract

Graphene nanoribbons (GNRs) are a good replacement material for silicon to overcome short-channel effects in nanoscale devices. However, with continuous technology scaling, the variability of device parameters also increases. Indeed, process, voltage, and temperature (PVT) variations affect the performance of GNR devices because of their small size. Moreover, the bandgap of GNRs is strongly affected by the number of carbon atoms across the channel width. This paper accurately evaluates the impact of such PVT variations on the performance of circuits based on Schottky barrier (SB)-type GNR field-effect transistors (SB-GNRFETs) in terms of their timing parameters, power, and energy–delay product (EDP). Extensive simulations and stability analysis are performed on both flip-flop and conventional six-transistor static random-access memory (6T SRAM) cells made using SB-GNRFETs under these variations. A statistical analysis of the impact of the PVT variations on the SB-GNRFET-based flip-flop is also performed using Monte Carlo simulations, considering the variation of one or all of the parameters, with or without line-edge roughness effects.