Abstract

A 65–67 GHz phase-locked loop (PLL) with a novel low power phase-frequency detector (PFD) in 65 nm LP CMOS is presented. The PLL consists of a V-band voltage-controlled oscillator (VCO), a divide-by-two injection-locked frequency divider (ILFD), and a current-mode logic (CML) divider chain. A charge pump (CP) and a 2nd-order loop filter are used with PFD for VCO tuning. The PFD is implemented with 16 transistors with dead-zone-free capability. The measured locking range of the PLL is from 65.15 to 67.4 GHz, with −11.5 dBm measured output power at 66.05 GHz while consuming 88 mW. The measured phase noise at 1 MHz offset is −84.43 dBc/Hz. The chip area of the PLL is 0.84 mm2 including probing pads. The proposed PLL can be utilized as a frequency synthesizer for carrier signal generation in IEEE 802.11ad standard high data rate transceiver circuits.

Highlights

  • Phase-locked signal sources are a critical building block for millimeter-wave radio systems, since they provide a stable frequency and phase reference as a local oscillator (LO) [1,2,3,4,5]

  • We present a 65–67 GHz phase-locked loops (PLL) based on a V-band voltage-controlled oscillator (VCO), a V-band injection-locked frequency divider (ILFD), and a novel phase-frequency detector (PFD), which is simpler and consumes less power than conventional ones

  • The designed PLL is fabricated in 65 nm LP CMOS process

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Summary

Introduction

Phase-locked signal sources are a critical building block for millimeter-wave radio systems, since they provide a stable frequency and phase reference as a local oscillator (LO) [1,2,3,4,5]. A recent advance in CMOS technologies has enabled the implementation of low-power, low phase-noise integrated phase-locked loops (PLL) operating at millimeter-wave frequencies [6,7]. In [8], a V-band. In [9], a 40, 60, and 80 GHz bands PLL, using multi-mode. LC-based injection-locked frequency divider (ILFD), is designed in 90-nm CMOS. 16-QAM modulation is presented in [10]. An 81–86 GHz frequency synthesizer is demonstrated in [11]

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