Abstract

This article presents a low-power CMOS digitally controlled variable gain low-noise amplifier (VGLNA) at $V$ -band in a 40-nm LP CMOS process. There are three amplifier stages and three digital gain control bits in this VGLNA. The first stage is a common source amplifier, and the second and third stages are current-reused amplifiers. In order to save dc power and control gain, we use the current-reused technique and add the digital switch between upper and lower transistors. Due to constant dc current, the input impedance of the current-reused stage is stable. Output impedance is stabilized by an ac grounding capacitor at the source terminal of the upper transistor under gain switching. Thus, our proposed VGA can minimize the interstage influence with the previous and following stage and maintain OP1dB due to the constant bias current. By adding a resonated inductor to cancel out the parasitic capacitance of switch transistor, we can keep bandwidth and improve noise figure (N.F.) at the current-reused stages under different gain states. The measured peak gain is 19.8 dB at 59.6 GHz, and lowest N.F. is 5.98 at 63.5 GHz. The gain states are 19.8/15.3/11.5/6.5 dB, respectively, and the measured input/output return loss is stable under different gain states. The IP1dB is increased from −29.5 to −17 dBm, and the OP1dB is nearly constant under different gain states. Total dc power consumption is only 18 mW for 1.1-V supplied voltage. This is the first digital current-reused VGLNA that has good FoM among digital VGLNA, the lowest dc power consumption, and compact die area at $V$ -band.

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