A universal and efficient equivalent modeling method for thermal analysis of 3D ICs containing tapered TSVs

Abstract

As the preferred interconnect solution in three-dimensional integrated circuits (3D ICs), through‑silicon vias (TSVs) have high-aspect-ratio features, which make the tapering effect inevitable. Although 3D integration brings many benefits, 3D ICs also face severe thermal management challenges due to their higher level of integration. And most of the existing thermal analysis methods are not suitable for 3D ICs with tapered TSVs. In this brief, a fast extraction method for equivalent thermal conductivity of 3D ICs was proposed. The validity of the proposed method was verified by comparison with previous experimental results and a detailed 3D finite element model. Furthermore, the method was also applied to the thermal analysis of a 3D IC model with six-layer of dies. Compared to the detailed model, the calculation time has been reduced by 88% based on the equivalent simplified model while providing well-matched accuracy (maximum temperature difference ≤ 1%). In addition, the effects of slope angle on heat transfer under different model parameters were investigated. The results demonstrated that the effect of the slope angle on the cross-plane equivalent thermal conductivity of the tapered TSVs chip was not negligible. On the contrary, the effect in in-plane direction could be omitted in some specific cases.