Abstract

A new unified design of an event-based PID control architecture for self-regulating and integral processes is investigated in this work. The design is based on the symmetrical-send-on-delta (SSOD) sampling technique and on the filtered Smith predictor (FSP). In particular, the conditions to achieve robust stability to limit cycles are studied from the point of view of the filter parameters through the describing functions theory. In this context, a simple frequency domain-based tuning methodology to address the cases of first-order-plus-dead-time and integrator-plus-dead-time processes is proposed. With this method, the properties of the filter parameters are also explored to cope with the set-point tracking and the load disturbance rejection tasks. The effectiveness of the general approach is evaluated by simulations and experimental tests.

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