A unified duty-cycle modulation algorithm for a three-level NPC inverter

Abstract

In this paper, it is a kind of challenge to simplify the conventional pulse width modulation (PWM) algorithms for a three-level neutral-point-clamped inverter. Thus, the unified duty-cycle modulation (UDM) algorithm is presented. It is more attractive than the carrier-based PWM (CBPWM), space-vector PWM (SVPWM), and unified PWM algorithms with a simpler calculation by utilizing the usefulness of the SVPWM algorithm to synthesize the duty cycles in time-domain and the CBPWM algorithm to synthesize the duty cycles in frequency-domain with the lesser conditions and the blankness of the lookup tables, switching sequence design, and zero-sequence component finding. Besides, it is outstanding with three outcomes: (1) comprehensive mathematical models of the dwell times, (2) permanent mathematical models of the duty cycles in time-domain, and (3) simplified PWM algorithm, which has a better workflow with the reduction of the computation burden. As it is very easy to implement as the sinusoidal PWM technique while its performance is equivalent to the SVPWM algorithm, this makes the proposed UDM algorithm a good candidate to optimize between the performance and the cost. Both the simulation and experimental results can confirm the feasible practicability and performance. The comparison with the conventional algorithms can evidently emphasize the superiority.