A two-transistor SIMOS EAROM cell

Abstract

A new, electrically alterable, nonvolatile memory cell, consisting of a floating gate memory transistor and an access transistor, has been developed using the self-aligned n-channel stacked-gate injection-type MOS (SIMOS) technique. Programming is achieved by two mechanisms: channel injection of hot electrons and field emission. Analysis of experimental data shows that the contribution of the field emission mechanism to programming is significantly high when the memory device operates in the depletion mode. Erase occurs via field emission of electrons from the floating gate through a thin oxide thermally grown on monosilicon to an n/SUP +/-diffusion area placed outside the channel region of the memory transistor. This additional floating gate/n/SUP +/-diffusion overlap is also utilized to increase the programming efficiency by applying a voltage to the n/SUP +/-diffusion terminal in addition to the gate and the drain voltage. This voltage is shown to have a strong influence on the two programming mechanisms. Memory retention compares favorably with that of the most advanced electrically programmable, read-only memory (EPROM) devices. Endurance is limited by charge trapping in the thin erase oxide to approximately 10000 write/erase cycles.