Abstract

This paper presents a scheme for testing DAC static nonlinearity errors by using a two-step flash ADC with deterministic dynamic element matching (DDEM). In this work, the structure of the two-step ADC, the switching strategy of DDEM, and the DAC test algorithm are discussed. The performance of the proposed approach is validated by using numerical simulation. Simulation results show that a low accuracy two-step ADC with an 8-bit coarse stage and a 6-bit fine stage is capable of testing a 14-bit DAC to 1-LSB accuracy by using the proposed DDEM strategy. This test approach has potential for built-in self-test (BIST) of precision DAC because of the low requirement on ADC performance and the simple element matching strategy.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.