Abstract
A surface micromachined two-dimensional (2-D) accelerometer is designed and implemented in CMOS. The implementation requires the addition of three masking steps to a commercially available standard CMOS process. It has a /spl plusmn/100 g full range reading and better than 1% linearity within this range with a sensitivity of 0.5 mV/g. The signal detection circuitry is an on-chip switched capacitor charge transfer circuit operating on an internally generated 1 MHz four-phase nonoverlapping clock. The design takes into account the electrostatic forces, the damping force, and the applied force due to acceleration.
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More From: IEEE Transactions on Instrumentation and Measurement
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