Abstract
In this paper, we propose a design of a two-channel high-performance DC-DC converter that provides a positive voltage VPOS with a low ripple, and a negative voltage VNEG with high power efficiency, for the purpose of enhancing power efficiency and output ripple under light loads of 100 mA or less for mobile active-matrix organic light-emitting diode (AMOLED) displays. The VPOS was designed as a boost converter using a novel input voltage variation reduction circuit (IVVRC), which rapidly changes the pulse width for input voltage fluctuations, using a feed-forward path. The VNEG was designed as an inverting buck–boost converter based on the pulse width modulation–set time variable pulse width modulation (PWM–SPWM) dual-mode switching method to enhance power efficiency, especially under light loads, and to reduce the overhead of the circuit configuration using a voltage-controlled oscillator. In addition, an adaptive dead-time using voltage detection of switching node (ADTVS) circuit was proposed to enhance power efficiency, which detects the voltage of the switching node at every cycle, and keeps the dead-time constant irrespective of changes in driving conditions. The proposed converter was fabricated with a chip size of 1.67 mm × 2.44 mm, using a 0.35 μm BCD process. Measurement results showed that the power efficiency of our converter was 72.9%~90.4% at 5 mA–100 mA light load output current, which is 2.7%~5.8% higher than the output of the previous converter. Furthermore, the output voltage ripple of VPOS and VNEG at 5 mA light load output current was 3.0 mV and 5.3 mV, respectively, which improved by 19% and 25% as compared to those of the previous converter, respectively.
Highlights
Active-matrix organic light-emitting diode (AMOLED) displays have been widely applied from mobile devices such as smart-phone to wearable devices such as smart-watch and smart-band, owing to its advantages of being light weight and thin, and having a low-voltage drive, self-illumination, and fast response speed [1,2]
The overshoot of our VNEG was 3 mV smaller than that of [4], and the duration time was 10 μs faster than [4]. This may be the result of the PWM–SPWM dual-mode method that only generated set pulses through voltage-controlled oscillator (VCO), based on PWM and the reset circuit that generated a constant clock of 1.5 MHz operating together, which allowed the mode transition based on the increase in the output current to reach 1.5 MHz in the PWM mode without time delay
We proposed a design of a two-channel high-performance DC-DC converter that provides the output of a positive voltage VPOS with a small ripple and a negative voltage VNEG with high-efficiency, for use in the mobile AMOLED displays
Summary
Active-matrix organic light-emitting diode (AMOLED) displays have been widely applied from mobile devices such as smart-phone to wearable devices such as smart-watch and smart-band, owing to its advantages of being light weight and thin, and having a low-voltage drive, self-illumination, and fast response speed [1,2]. The recent development of the low temperature polycrystalline oxide (LTPO) process significantly reduces the driving current of AMOLED displays, and mobile devices are equipped with always on display (AOD) functions, making it essential to have high power efficiency even under light loads Both a positive and negative power are required to operate an AMOLED panel, which are generally supplied by a two-channel DC-DC converter using a VPOS channel that generates positive power and a VNEG channel that generates negative power [3]. We designed a two-channel high-performance DC-DC converter that outputs a positive voltage VPOS with a small ripple for the variation in input voltage and a negative voltage VNEG with high power efficiency, in order to be applicable to a mobile AMOLED display under light loads of 100 mA or less. This paper is structured as follows: Section 2 details the design of the proposed twochannel high-performance DC-DC converter for AMOLED display; Section 3 presents the measurement results of an implemented chip; and Section 4 discusses the conclusion
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