A tool for automatic generation of RTL-level VHDL description of RNS FIR filters

Abstract

Although digital filters based on the residue number system (RNS) show high performance and low power dissipation, RNS filters are not widely used in DSP systems, because of the complexity of the algorithms involved. We present a tool to design RNS FIR filters which hides the RNS algorithms to the designer, and generates a synthesizable VHDL description of the filter taking into account several design constraints such as: delay, area, and energy.