A threshold voltage and drain current model for symmetric dual-gate amorphous InGaZnO thin film transistors

Abstract

Based on the drift-diffusion theory, a simple threshold voltage and drain current model for symmetric dual-gate (DG) amorphous InGaZnO (a-IGZO) thin film transistors (TFTs) is developed. In the subthreshold region, most of the free electrons are captured by trap states in the bandgap of a-IGZO, thus the ionized trap states are the main contributor to the diffusion component of device drain current. Whereas in the above-threshold region, most of the trap states are ionized, and free electrons increase dramatically with gate voltage, which in turn become the main source of the drift component of device drain current. Therefore, threshold voltage of DG a-IGZO TFTs is defined as the gate voltage where the diffusion component of drain current equals the drift one, which can be determined with physical parameters of a-IGZO. The developed threshold voltage model is proved to be consistent with trap-limited conduction mechanism prevailing in a-IGZO, with the effect of drain bias being also taken into account. The gate overdrive voltage-dependent mobility is well modeled by the derived threshold voltage, and comparisons of the obtained drain current with experiment data show good verification of our model.