Abstract
Ferroelectrics offer a promising material platform to realize energy-efficient non-volatile memory technology with the FeFET-based implementations being one of the most area-efficient ferroelectric memory architectures. However, the FeFET operation entails a fundamental trade-off between the read and the program operations. To overcome this trade-off, we propose in this work, a novel device concept, Mott-FeFET, that aims to replace the Silicon channel of the FeFET with VO2- a material that exhibits an electrically driven insulator–metal phase transition. The Mott-FeFET design, which demonstrates a (ferroelectric) polarization-dependent threshold voltage, enables the read current distinguishability (i.e., the ratio of current sensed when the Mott-FeFET is in state 1 and 0, respectively) to be independent of the program voltage. This enables the device to be programmed at low voltages without affecting the ability to sense/read the state of the device. Our work provides a pathway to realize low-voltage and energy-efficient non-volatile memory solutions.
Highlights
Ferroelectrics offer a promising material platform to realize energy-efficient non-volatile memory technology with the FeFET-based implementations being one of the most area-efficient ferroelectric memory architectures
The objective of this work is to propose a pathway to overcome this tradeoff and help reduce the programming voltage by replacing the Silicon channel by an alternate channel material, V O2, that exhibits the phenomenon of electrically driven insulator-to-metal transition (IMT)
Increasing the memory window and the corresponding Ibit_1/Ibit_0 requires the application of a significantly larger programming voltage. This is because in the FeFET configuration, the ferroelectric typically operates on a minor loop of the polarization versus voltage characteristics and improving the MW entails increasing the hysteresis by the application of a larger programming voltage
Summary
Ferroelectrics offer a promising material platform to realize energy-efficient non-volatile memory technology with the FeFET-based implementations being one of the most area-efficient ferroelectric memory architectures. Increasing the memory window and the corresponding Ibit_1/Ibit_0 requires the application of a significantly larger programming voltage This is because in the FeFET configuration, the ferroelectric typically operates on a minor loop (not saturation loop) of the polarization versus voltage characteristics and improving the MW entails increasing the hysteresis by the application of a larger programming voltage. These contending factors can become even more critical while operating the cell in a memory array where the parasitic currents from half-selected cells can further compromise the read distinguishability.
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