Abstract
An advanced static VAr compensator (ASVC) employing a three-level inverter has been investigated for three-phase applications. The paper describes the operating principles of the ASVC using an elementary single phase ASVC circuit. The construction of a hardware model of the three-phase, three-level ASVC is then presented. The performance of the ASVC is obtained from an experimental study carried out on this laboratory model. The use of the selective harmonic elimination modulation (SHEM) technique to minimize harmonics is explored. Experimental studies have been carried out to determine the speed of response of the scheme by controlling it in a closed loop.
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