A Theoretical Analysis of Fibonacci Coding Techniques on On-chip Data Bus

Abstract

As VLSI technology has scaled down towards the Deep Sub-micrometer (DSM) technology the crosstalk delay is flattering a great part of the total delay of a circuit. In addition, the escalating of cross-coupling capacitances among on-chip bus wires on the identical metal layer generates a situation where the delay of a wire is effectively relying on the electrical status of its adjacent wires. Therefore the data patterns on the on-chip data bus will affect the crosstalk delay. In this Paper, the performance of the Fibonacci coding techniques with respect to transition energy and crosstalk delay has been carried out and compared between them. The simulation results show that the NFF, RF and CRF coding technique offers on average ∼50% energy savings and average ∼30% delay reduction. So the entire system performance increases while the crosstalk delay reduces. Hence, these coding techniques increase the speed of the bus and/or diminish the total energy dissipation.