A test point selection approach for DC analog circuits with large number of predefined faults

Abstract

Test point selection is an important stage in analog circuits fault diagnosis. In this paper, a test point selection method is proposed that is suitable for large numbers of predefined faults in DC analog circuits using the technique of constructing a fault dictionary for each component. Main idea is selecting a test point set with minimum amount of overlap between fault and no-fault regions for each component. A combined exclusive-inclusive algorithm is applied on each fault dictionary and using the achieved information, a grade is given to each test point. Then the test points with grades lower than a threshold value are eliminated and a decision guide is provided for tester to select final test point set. Applying this method on a benchmark circuit is eliminating 22% of test points and the accuracy metrics of proposed approach is comparable with using all of the test points. The results show that by eliminating 56% of the test points, the accuracy metrics just drops about 4%.