A TDR-Based Method for Pre-bond Testing of the Silicon Interposer in 2.5D ICs

Abstract

Since the passive silicon interposer is the least expensive component in interposer-based 2.5-dimensional integrated circuits (2.5D ICs), it is necessary to test the interposer before die stacking, in order to minimize the yield loss caused by the stacking of defect-free dies on a faulty interposer. This paper presents the application of time domain reflectometry (TDR) to pre-bond testing of silicon interposer. The proposed test structure utilizes e-fuses to connect separated horizontal and vertical interconnects into one test path during testing. Thus, by applying the test stimulus pulse of TDR at a C4 bump which is available to be probed directly, the horizontal and vertical interconnect test can be implemented simultaneously. Once there exists some defects in the test path, the emission pulse will be reflected on the fault point because the impedance of it differs from that of transmission line. The oscillogram of simulation result shows that the reflection signals are in accordance with the defect and impedance mismatch points as expected. Further analysis with feature extraction and support vector machine (SVM) can get the fault location accurately and distinguish the type successfully.