A systems-oriented single event effects test approach for high speed digital phase-locked loops

Abstract

A systems-oriented single event effects (SEE) test approach is outlined here for two different phase-locked loop (PLL) application specific integrated circuits (ASICs) used for spaceborne local oscillator (LO) generation. The system considerations in designing the upset detection technique is described. This is the only known technique for getting information critical to the system about single event upset (SEU) sensitivity at speed for PLLs. Test results are presented for PLL devices operating at clock speeds of 1.0 and 1.5 GHz. Significant frequency effects were not observed in these devices since the clock speed varied only 50%.