Abstract

A systematic methodology is developed for multi-images encryption and decryption and field programmable gate array (FPGA) embedded implementation by using single discrete time chaotic system. To overcome the traditional limitations that a chaotic system can only encrypt or decrypt one image, this paper initiates a new approach to designn-dimensional (n-D) discrete time chaotic controlled systems via some variables anticontrol, which can achieve multipath drive-response synchronization. To that end, the designedn-dimensional discrete time chaotic controlled systems are used for multi-images encryption and decryption. A generalized design principle and the corresponding implementation steps are also given. Based on the FPGA embedded hardware system working platform with XUP Virtex-II type, a chaotic secure communication system for three digital color images encryption and decryption by using a 7D discrete time chaotic system is designed, and the related system design and hardware implementation results are demonstrated, with the related mathematical problems analyzed.

Highlights

  • Chaos control refers to purposefully eliminating or weakening chaotic behavior of systems through control methods when the chaotic motion is harmful

  • The idea of the Chen-Lai and Wang-Chen algorithms is to design a linear state feedback controller, which can change the eigenvalues of the system Jacobian matrix, thereby assigning desirable Lyapunov exponents to the controlled system [4]

  • field programmable gate array (FPGA) embedded hardware implementation results are shown in Figures 11, 12, 13, and 14

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Summary

Introduction

Chaos control refers to purposefully eliminating or weakening chaotic behavior of systems through control methods when the chaotic motion is harmful. In this paper, differing from the Chen-Lai and WangChen algorithms, a new approach for designing n-dimensional discrete-time chaotic systems via some state-variable anticontrol is initiated, and a generalized design principle and the corresponding implementation steps are given. Based on the FPGA embedded hardware system working platform with FPGA chip model XUP Virtex-II, a chaotic secure communication system for three digital color images encryption and decryption by using a 7D discrete time chaotic system is designed and implemented, with experimental results demonstrated. Both theoretical analysis and experimental results confirm the feasibility of this approach.

Design of Discrete Time Chaotic System via Some Variable Anticontrol
A Typical Example
Analysis of Multipath Drive-Response Chaotic Synchronization
FPGA Embedded Implementation for Three Images Encryption and Decryption
NIST Safety Performance Test Results
Conclusions
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