Abstract
Multitransform techniques have been widely used in modern video coding and have better compression efficiency than the single transform technique that is used conventionally. However, every transform needs a corresponding hardware implementation, which results in a high hardware cost for multiple transforms. A novel method that includes a five-step operation sharing synthesis and architecture-unification techniques is proposed to systematically share the hardware and reduce the cost of multitransform coding. In order to demonstrate the effectiveness of the method, a unified architecture is designed using the method for all of the six transforms involved in the H.264 video codec: 2D 4 × 4 forward and inverse integer transforms, 2D 4 × 4 and 2 × 2 Hadamard transforms, and 1D 8 × 8 forward and inverse integer transforms. Firstly, the six H.264 transform architectures are designed at a low cost using the proposed five-step operation sharing synthesis technique. Secondly, the proposed architecture-unification technique further unifies these six transform architectures into a low cost hardware-unified architecture. The unified architecture requires only 28 adders, 16 subtractors, 40 shifters, and a proposed mux-based routing network, and the gate count is only 16308. The unified architecture processes 8 pixels/clock-cycle, up to 275 MHz, which is equal to 707 Full-HD 1080 p frames/second.
Highlights
Video coding standards commonly use transform coding techniques—discrete cosine transforms (DCTs) are widely used in image and video compression standards, such as JPEG [1], MPEG-1/2 [2, 3], and MPEG-4 [4]
A systematic hardware sharing method that allows a unified architecture for H.264 transforms is presented
When all of the six five-step operation sharing synthesis (FOSS) architectures of the H.264 transforms are determined, an architecture-unification design flow is proposed that unifies all of the low cost transform FOSS architectures into a single architecture to eliminate the redundant hardware
Summary
Video coding standards commonly use transform coding techniques—discrete cosine transforms (DCTs) are widely used in image and video compression standards, such as JPEG [1], MPEG-1/2 [2, 3], and MPEG-4 [4]. In [25], a unique kernel for multistandard video encoder transforms is presented and a configurable butterfly array (CBA) is proposed, which supports both the forward transform and the inverse transform in the unified architecture of the multistandard video encoder in [26] These studies demonstrate combined architectures for multiple transforms, a single architecture has not been designed for the whole set of forward and inverse transforms for H.264 encoder and decoder. This paper proposed a novel method that includes a five-step operation sharing synthesis (FOSS) and architecture-unification techniques, to systematically share the hardware and reduce the cost of multitransform coding. Six transform architectures are designed for low cost, using the proposed five-step operation sharing synthesis (FOSS) technique. The complexity and performance of the unified architecture are analyzed in Section 4, and Section 5 concludes the paper
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