A Switched-Capacitor RF Front End With Embedded Programmable High-Order Filtering

Abstract

We propose a switched-capacitor radio-frequency (RF) front end achieving an equivalent high-order, tunable, highly linear RF filtering to improve the out-of-band (OB) blocker tolerance. RF input impedance matching, N-path filtering, high-order discrete-time infinite-impulse response (IIR) filtering, and down-conversion are implemented using only switches and capacitors in a 0.1-0.7 GHz prototype with tunable center frequency, programmable filter order, and very high tolerance for OB blockers. The 40 nm CMOS frontend consumes 38.5-76.5 mA, achieves 40 dB gain, 24 dBm OB IIP3, 14.7 dBm 1 dB blocker compression point (B1dB) for a 30 MHz blocker offset, 6.8-9.7 dB noise figure, and > 66 dB calibrated harmonic rejection ratio.