Abstract

In this paper, we propose a new scheme to directly power a 4.9-5.6GHz LC oscillator from a recursive switched-capacitor DC-DC converter. A finite-state machine is integrated to automatically adjust the conversion ratio and switching frequency of the converter such that its DC output voltage is within ±5% of the desired 1V across input voltage range 1.3-2.2V and <; 2mA load current conditions. A gate-driver circuit is embedded in each switch of the converter to guarantee constant on-resistance across PVT variations without sacrificing device reliability. Furthermore, a spur reduction block (SRB) is embedded in the oscillator to suppress the ripple induced spurs by stabilizing its tail current. Both the converter and the oscillator are implemented in 40-nm CMOS technology. The measured peak power efficiency of the converter is 87%, while its spot noise is <; 1.5nV/√(Hz), which does not degrade the phase noise of the oscillator. The SRB suppresses the spur to <; -65dBc under the 30mV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">pp</sub> ripple of the converter.

Highlights

  • T HE Internet-of-Things (IoT) is constantly spanning new applications [1]

  • With the proposed gate-driver circuit, the realization of the non-overlapping clocks is simplified as all switches operate in the same voltage domain and are powered by the stable output voltage of the converter (VOU T = 1 V)

  • They occupy an active area of 1.54 mm2 and 0.23 mm2, respectively

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Summary

INTRODUCTION

T HE Internet-of-Things (IoT) is constantly spanning new applications [1]. IoT devices are mostly powered from energy stored in supercapacitors or batteries. SC converters operate at much higher switching frequencies, forcing to increase the LDO’s bandwidth and its quiescent current [7]. URSO et al.: SWITCHED-CAPACITOR DC-DC CONVERTER POWERING AN LC OSCILLATOR further away from the dominant one to ensure the LDO’s stability [9]. The size of the LDO pass transistor must be reduced increasing the drop-out voltage, leading to the decrease of power efficiency. Another trade-off exists between the LDO’s PSR and power efficiency. Due to the lack of LDO isolation, the converter’s ripple is up-converted and appears at the oscillator’s output spectrum, degrading its spectral purity.

DC-DC CONVERTER DESIGN
Requirements on Conversion Ratio Range and Resolution
Topology Definition
Charge Flow and Impedance Analysis
FSM-Based Digital Control
Steady-State Loss Analysis
GATE-DRIVER DESIGN
Practical Design Considerations
Supply Noise Requirements
Noise Analysis of the DC-DC Converter
Oscillator’s Supply Pushing Factor
EXPERIMENTAL RESULTS
DC-DC Converter Measurements
System-Level Measurements
CONCLUSION
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